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个人简介
Jean-Philippe Colonna was born in Rouen, France, in 1974. He received the French Diploma of Engineering degree in microelectronics from the Polytechnics Institute of Grenoble, Grenoble, France, in 1998, and the M.Sc. degree in semiconductor science and technology from Imperial College London, London, U.K., in 1999.
He joined STMicroelectronics, Crolles, France, in 1999, and worked in the diffusion group for three years. In 2002, he joined the RTP Group, Intel, Leixlip, Ireland, as a Process Engineer. In 2005, he joined CEA-Leti MINATEC, Grenoble, as a Research Engineer, where he was with the 3-D-Integration Group, STMicroelectronics, in 2010. He has authored or coauthored over 80 publications in international conferences or papers in refereed journals. His research interests include materials and their integration in nonvolatile memory devices (nanocrystals, high-k, and charge trap), chip stacking, TSV,
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-bumps and thermal solutions for 3-D packages (passive dissipation,
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-fluidics, and thermal modeling).
研究兴趣
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IEEE Transactions on Components, Packaging and Manufacturing Technologyno. 3 (2018): 1-1
P. Coudrain,J.-P. Colonna,L.-M. Collin,R. Prieto,L.G. Fréchette,J. Barrau, G. Savelli,P. Vivet, Q. Struss,J. Widiez,K. Vladimirova,K. Triantopoulos,
J. P. Colonna,R. Prieto,P. Coudrain, Y. Hallez,D. Campos, O. Le-Briz,R. Franiatte, C. Brunet-Manquat, C. Chancel, V. Rat
2016 6th Electronic System-Integration Technology Conference (ESTC)pp.1-8, (2016)
R. Prieto,P. Coudrain,J. P. Colonna, Y. Hallez, C. Chancel, V. Rat, S. Dumas, G. Romano,R. Franiatte, C. Brunet-Manquiat,S. Cheramy,A. Farcy
2016 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC)pp.1-6, (2016)
L Collin,Vincent Fiori,P Coudrain,Sandrine Lhostis,S Cheramy,J P Colonna, Barry Mathieu,Abdelkader Souifi,Luc G Frechette
PROCEEDINGS OF THE ASME 13TH INTERNATIONAL CONFERENCE ON NANOCHANNELS, MICROCHANNELS, AND MINICHANNELS, 2015 (2015)
Thermal Measurement, Modeling & Management Symposiumpp.221-227, (2015)
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