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Joseph J. Nahas (S’62–M’69–SM’03) received the Ph.D. degree in electrical engineering from Purdue University, West Lafayette, IN, USA, in 1971. He joined the Faculty of the Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, USA, in 1971, and Bell Laboratories, Murray Hill, NJ, USA, in 1976. At Bell Laboratories, he was progressively a Technical Staff Member, a Supervisor of the Analog/Digital IC Design Group, where he was responsible for the development of the first fully functional single chip telephone. He was also the Head of the Microprocessor Design Department, in which the 32 200, CRISP, and Hobbit microprocessors were developed. In 1990, he joined the Motorola Semiconductor Product Sector (now Freescale Semiconductor), Austin, TX, USA, as a Manager of the Advanced Product Development for the High-End Microprocessor Division. At Motorola, he was the Manager of the 88 000 Microprocessor Operation, the Chief of the Semiconductor Technology Staff, and the Director of Technology Planning. In 2001, he returned to active design work, where he was a Senior Technical Staff Member and a Project Leader in the technology solutions organization with Freescale Semiconductor working on the design of magnetoresistive random access memories (MRAM). He has been an Adjunct Professor of the Computer Science and Engineering and the Electrical Engineering Departments at the University of Notre Dame, since 2008, where he worked on MRAM and other memory architectures and circuits, on circuits for implementing nanomagnetic logic, and circuits exploiting steep slope transistors. He holds 39 patents in telecommunications analog circuits and architectures, voltage references and regulators, and memory circuits and architectures. He is also a member of ACM.
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论文共 87 篇作者统计合作学者相似作者
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Proceedings (Baylor University. Medical Center)no. 4 (2024): 655-658
Abubakar Tauseef,Maryam Zafar,Peter Silberstein,Joseph Nahas, Thomas Frederickson, Sean Hansen,Anum Abbas, Yaman Alali,Avdesh Buragadda,Omar K Abughanimeh,Sunil Nair,Joseph Thirumalareddy,
Federal Practitionerno. Suppl 3 (2022): S72-S80
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