Jing-Hong Conan Zhan

Jing-Hong Conan Zhan (S'97–M'04) was born in Hsinchu, Taiwan, in 1974. He received the Ph.D. degree in electrical engineering and computer science from Cornell University, Ithaca, NY, in 2004, specializing in VCO and high-speed clock and data recovery circuit design using BiCMOS and CMOS technologies. From 1999 to 2001, he was with MediaTek, Hsinchu, Taiwan, where he developed read channel data path and spindle motor control circuitry for optical storage systems as a logic design engineer. In June 2004, he joined Intel Communication Circuit Lab, Hillsboro, Oregon, where he focused on receiver front-end circuitry for broadband multi-standard applications using digital CMOS process for microprocessors production. In September 2006, he joined MediaTek RF division, where he led a DVB-H tuner design team, designed various front-end building blocks, and supervised the chipset design activities. He also designed DCOs for digital intensive PLLs targeting for mobile phone applications. From October 2007 to October 2009, he participated the joint development of a 60 GHz phased-array system with IBM T. J. Watson Research Center design team. He co-designed the synthesizer, oversaw chipset, antenna, packaging design and fabrication activities. Since October 2009, Dr. Zhan has supervised a centralized RF synthesizer design team, and led MediaTek's millimeter-wave chipset development.