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个人简介
Holger Eisenreich graduated from Technische Universität Dresden, Germany, in 2003. In parallel to his studies, he spent more than two years as an intern at AMD's DDC in Dresden as part of the digital verification team.
After finishing his diploma thesis, he joined the chair of Highly-Parallel VLSI-Systems and Neuromorphic Circuits as a research assistant. Within the frame of research and industry cooperation projects, he was responsible for the logical and physical implementation of several multimillion-gates SoCs in technologies ranging from 0.13 $\mu\hbox{m}$ down to 28 nm. Based on that experience, he co-founded RacyICs at the end of 2009.
研究兴趣
论文共 31 篇作者统计合作学者相似作者
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2023 20TH INTERNATIONAL SOC DESIGN CONFERENCE, ISOCC (2023): 67-68
2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS)pp.1-3, (2020)
Sebastian Höppner,Jörg Schreiter,Robert Niebsch,Stephan Scherzer,Ulrich Hensel, Jörg Winkler, Mario Orgis,Holger Eisenreich,Dennis Walter, Uwe Steeb, André Scharfe Clifford Dmello, Robert Sinkwitz,
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作者统计
#Papers: 31
#Citation: 551
H-Index: 16
G-Index: 23
Sociability: 5
Diversity: 1
Activity: 0
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