基本信息
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Bio
Gary W. Maier received the A.S. degree in electromechanical engineering from Dutchess Community College, Poughkeepsie, NY, USA, and the BSEE degree from Manhattan College, Bronx, NY, USA.
He joined the U.S. Navy where he served four years repairing Radar systems for the Blue Angels. He is a Test Engineer at IBM in East Fishkill, NY, USA. He joined IBM in 1982. He has a wealth of experience developing ATE test systems, design and test for IBM Power Processor products, 300 mm manufacturing yield learning, and technology development. He is currently with IBM Systems and Technology Group where he is leading test development of new probing, test, and handler solutions to solve future packaging test challenges. His key technical contributions have been the development an accelerated yield learning environment for IBM and the world's first fine pitch active test probe for testing 3D stacks. He has many patents and publications including feature articles in Semiconductor International and IEEE Design and Test.
Mr. Maier has received several corporate awards at IBM. He is a committee member of several test conferences where he contributes his wealth of test knowledge to the industry and academics.
Research Interests
Papers共 13 篇Author StatisticsCo-AuthorSimilar Experts
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Proceedings of the IEEEno. 12 (2020): 2232-2250
IEEE Solid-State Circuits Lettersno. 12 (2018): 217-220
John Safran, Giri N. K. Rangan, Venkata Nr Vanukuru, Sandeep Torgal,Vikram Chaturvedi, Sarath K. P. Lal, Shahid Butt,Gary Maier,Alberto Cestero,Thuy Tran-Quinn,Joyeeta Nag,Sami Rosenblatt,
mag(2015)
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Journal of Low Power Electronics and Applicationsno. 2 (2014): 77-89
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Author Statistics
#Papers: 10
#Citation: 124
H-Index: 5
G-Index: 10
Sociability: 4
Diversity: 1
Activity: 0
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