My research focuses on the interaction between the architecture and software of computer systems and underlying hardware implementation challenges. These challenges include power, reliability, and variability issues across embedded and high-performance computing systems. A basic tenet of my research is that architecture design must be cognizant of these implementation issues, and that multi-layer solutions spanning circuits, architecture, and software can provide significant advantages. Addressing technology-scaling issues in a multi-layer fashion requires an understanding of the impact at the silicon level, and we have completed several prototype chip designs to meet these goals.