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Chittoor R. Parthasarathy received the bachelor’s degree in electronics and communications engineering from Nagarjuna University, India, in 1992, the master’s degree in reliability engineering from IIT Bombay, Mumbai, India, in 1995, and the Ph.D. degree in defense of design for reliability methodology in CMOS technologies from the Université de Provence, France, in 2006. He is currently a Senior Member Technical Staff with STMicroelectronics. He is in-charge of the ESD Solutions Group. His interests include enabling quality and reliability methodologies in designs to deal with various degradation phenomena.
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论文共 3 篇作者统计合作学者相似作者
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2019 41st Annual EOS/ESD Symposium (EOS/ESD) (2019): 1-6
PATMOS'07: Proceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation (2007): 191-+
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