Ching-Hwa Cheng

Ching-Hwa Cheng was born in Taiwan, Republic of China, He received an M.S.E.E degree from Chung Hwa University, Taiwan, in 1993, and a Ph.D. degree in Computer Science and Information Engineering from National Chung Cheng University, Taiwan, in 2000. His PhD dissertations and Master’s thesis are focused on logic optimization and fault tolerant computing, respectively. He is currently an associate professor of electronic engineering at Feng-Chia University. His research interests include low-power VLSI Design/EDA/testing related issues, such as multi-voltage design. His studies have included theoretical analysis model, design flow development, cell library generation and physical chip implementation. His work differs from that of other researchers in this field in that most of his research designs are silicon proven. He has honored with several design awards, published 16 journal papers, 46 conference papers, developed two design automation tools and has been invited to serve as a chip implementation reviewer by the Chip Implementation Center (CIC) and paper reviewer for several VLSI field journals/conferences. His major research fields include: (1) Low-Power circuit-design/CAD/chip-implementation/testing issues for multimedia applications. (2) Performance-Power trade off dynamic circuits design and testing issues. (3) Delay testing and performance binning DFT/BIST (4) Cell Library generation