Charles Morganti

Charles Morganti received the B.S. degree in engineering in 1993 from Harvey Mudd College, Claremont, CA, USA, and the M.S.E.E. degree in 1994 from Colorado State University, Fort Collins, CO, USA. He joined Intel in 1995 and has worked in the area of on-die cache design for multiple generations of Intel Itanium® and Xeon® processors. He was the technical lead of the last level cache design on the Xeon® Processor E5–2600 v3 and is currently leading the cache design for the next generation Xeon® processor family.