Wan Chia-Chen - Dept. of Electronics Engineering & Institute of Electronics, National Chiao Tung University

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论文共 11 篇作者统计合作学者相似作者

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Investigation of Boron Distribution at the SiO2/Si Interface of Monolayer Doping

Shu-Han Hsu,Chia-Chen Wan,Ta-Chun Cho,Yao-Jen Lee

ACS Omega（2021）

引用6浏览0WOS引用

Ge Nanowire FETs with HfZrOx Ferroelectric Gate Stack Exhibiting SS of Sub-60 Mv/dec and Biasing Effects on Ferroelectric Reliability

C. -J. Su,T. -C. Hong, Y. -C. Tsou,F. -J. Hou,P. -J. Sung,M. -S. Yeh,C. -C. Wan,K. -H. Kao,Y. -T. Tang,C. -H. Chiu,C. -J. Wang, S. -T. Chung, T. -Y. You, Y. -C. Huang,C. -T. Wu,K. -L. Lin,G. -L. Luo,K. -P. Huang,Y. -J. Lee,T. -S. Chao,W. -F. Wu,G. -W. Huang,J. -M. Shieh,W. -K. Yeh,Y. -H. Wang

2017 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)（2017）

引用23浏览0EIWOS引用

Suspended Ge Gate-All-around Nanowire Nfets with Junction Isolation on Bulk Si

Chia-Chen Wan,Guang-Li Luo,Shu-Han Hsu, Kuo-Dong Hung,Chun-Lin Chu, Tuo-Hung Hou, Chun-Jun Su,Szu-Hung Chen,Wen-Fa Wu,Wen-Kuan Yeh

2016 IEEE Silicon Nanoelectronics Workshop (SNW)（2016）

引用0浏览0EIWOS引用

Homogeneous Barrier Modulation of TaOx/TiO2 Bilayers for Ultra-High Endurance Three-Dimensional Storage-Class Memory

Chung-Wei Hsu,Yu-Fen Wang,Chia-Chen Wan,I-Ting Wang,Chun-Tse Chou,Wei-Li Lai,Yao-Jen Lee,Tuo-Hung Hou

Nanotechnology（2014）

引用84浏览0WOS引用

3d Vertical Taox/Tio2 Rram With Over 10(3) Self-Rectifying Ratio And Sub-Mu A Operating Current

Chung-Wei Hsu,Chia-Chen Wan,I-Ting Wang,Mei-Chin Chen,Chun-Li Lo,Yao-Jen Lee,Wen-Yueh Jang,Chen-Hsi Lin,Tuo-Hung Hou

2013 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) (2013)

引用0浏览0引用

3D Vertical TaOx/TiO2 RRAM with over 103 Self-Rectifying Ratio and Sub-Μa Operating Current

Chung-Wei Hsu,Chia-Chen Wan,I-Ting Wang,Mei-Chin Chen

Electron Devices Meeting（2013）

引用27浏览0EIWOS引用

320°Cマイクロ波ドーパント活性化を用いた3D 65nm CMOS

Yao‐Jen Lee,Yu‐Lun Lu, Hsueh Fu‐Kuo, Huang Kuo‐Chin,Wan Chia‐Chen,Cheng Tz‐Yen,Han Ming‐Hung, M Kowalski Jeff,E Kowalski Jeff,Heh Dawei, Hsi-Ta Chuang, Yiming Li,Chao Tien‐Sheng,WU Ching‐Yi,Yang Fu‐Liang

openalex（2009）

引用0浏览0引用

3D 65nm CMOS with 320°C Microwave Dopant Activation

Yao-Jen Lee,Yu-Lun Lu,Fu-Kuo Hsueh,Kuo-Chin Huang,Chia-Chen Wan,Tz-Yen Cheng,Ming-Hung Han, Jeff M. Kowalski,Jeff E. Kowalski,Dawei Heh, Hsi-Ta Chuang,Yiming Li,Tien-Sheng Chao,Ching-Yi Wu,Fu-Liang Yang

International Electron Devices Meeting（2009）

引用36浏览0EIWOS引用

Impacts of a Buffer Layer and Hi-Wafers on the Performance of Strained-Channel NMOSFETs with SiN Capping Layer

Tzu- Tsai,Yao-Jen Lee,King-Sheng Chen,Jeff Wang,Chia-Chen Wan,Fu-Kuo Hsueh,Horng-Chih Lin,Tien-Sheng Chao,Tiao-Yuan Huang

2007 International Semiconductor Device Research Symposium（2007）

引用0浏览0EIWOS引用

Reliability of Strained-Channel NMOSFETs with SiN Capping Layer on Hi-Wafers with a Thin LPCVD-TEOS Buffer Layer

Tzu- Tsai,Yao-Jen Lee,King-Sheng Chen,Jeff Wang,Chia-Chen Wan,Fu-Kuo Hsueh,Horng-Chih Lin, Tien-Sheng Cha,Tiao-Yuan Huang

2007 International Semiconductor Device Research Symposium（2007）

引用0浏览0EIWOS引用

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